System Mmr Assignments - Analog Devices ADSP-BF506F Hardware Reference Manual

A SYSTEM MMR ASSIGNMENTS
This appendix lists MMR addresses and register names for all system regis-
ters on the ADSP-BF50x processors.
function/peripheral and indicates the section later in this chapter where
individual registers for that group are listed. The tables in the later sec-
tions cross reference to individual register diagrams located in the chapter
where that register is described. The diagrams show individual bit descrip-
tions for each register.
Table A-1. Register Tables in This Chapter
Function/Peripheral
"System Reset and Interrupt Control Registers" on page A-4
"DMA/Memory DMA Control Registers" on page A-5
"Ports Registers" on page A-8
"Timer Registers" on page A-11
"Core Timer Registers" on page A-3
"Watchdog Timer Registers" on page A-15
"GP Counter Registers" on page A-15
"Dynamic Power Management Registers" on page A-17
"Processor-Specific Memory Registers" on page A-2
"PPI Registers" on page A-17
"SPI Controller Registers" on page A-18
"SPORT Controller Registers" on page A-19
"UART Controller Registers" on page A-23
"TWI Registers" on page A-25
ADSP-BF50x Blackfin Processor Hardware Reference
Table A-1 groups the registers by
A-1