Processor-Specific Memory Registers - Analog Devices ADSP-BF506F Hardware Reference Manual

Processor-Specific Memory Registers

Table A-1. Register Tables in This Chapter (Cont'd)
Function/Peripheral
"CAN Registers" on page A-26
"ACM Registers" on page A-42
"PWM Registers" on page A-44
"RSI Registers" on page A-46
These notes provide general information about the system mem-
ory-mapped registers (MMRs):
• The system MMR address range is 0xFFC0 0000 – 0xFFDF FFFF.
• All system MMRs are either 16 bits or 32 bits wide. MMRs that are
16 bits wide must be accessed with 16-bit read or write operations.
MMRs that are 32 bits wide must be accessed with 32-bit read or
write operations. Check the description of the MMR to determine
whether a 16-bit or a 32-bit access is required.
• All system MMR space that is not defined in this appendix is
reserved for internal use only.
Processor-Specific Memory Registers
Processor-specific memory registers (0xFFE0 0004 – 0xFFE0 0300) are
listed in Table
Table A-2. Processor-Specific Memory Registers
Memory-Mapped
Address
0xFFE0 0004
0xFFE0 0300
A-2
A-2.
Register Name
DMEM_CONTROL
DTEST_COMMAND
ADSP-BF50x Blackfin Processor Hardware Reference
For individual bits, see this diagram:
"L1 Data Memory Control Register" on
page 2-5
"Data Test Command Register" on page 2-6