Analog Devices ADSP-BF506F Hardware Reference Manual page 1215

Table A-8. Ports Registers (Cont'd)
Memory-Mapped
Address
0xFFC0 073C
0xFFC0 0740
0xFFC0 1500
0xFFC0 1504
0xFFC0 1508
0xFFC0 150C
0xFFC0 1510
0xFFC0 1514
0xFFC0 1518
0xFFC0 151C
0xFFC0 1520
0xFFC0 1524
0xFFC0 1528
0xFFC0 152C
0xFFC0 1530
0xFFC0 1534
0xFFC0 1538
0xFFC0 153C
0xFFC0 1540
ADSP-BF50x Blackfin Processor Hardware Reference
Register Name
PORTFIO_BOTH
PORTFIO_INEN
PORTGIO
PORTGIO_CLEAR
PORTGIO_SET
PORTGIO_TOGGLE
PORTGIO_MASKA
PORTGIO_MASKA_CLEAR
PORTGIO_MASKA_SET
PORTGIO_MASKA_TOGGLE
PORTGIO_MASKB
PORTGIO_MASKB_CLEAR
PORTGIO_MASKB_SET
PORTGIO_MASKB_TOGGLE
PORTGIO_DIR
PORTGIO_POLAR
PORTGIO_EDGE
PORTGIO_BOTH
PORTGIO_INEN
System MMR Assignments
For individual bits, see this diagram:
"GPIO Set on Both Edges Registers" on
page 9-34
"GPIO Input Enable Registers" on page 9-31
"GPIO Data Registers" on page 9-31
"GPIO Clear Registers" on page 9-32
"GPIO Set Registers" on page 9-32
"GPIO Toggle Registers" on page 9-33
"GPIO Mask Interrupt A Registers" on
page 9-35
"GPIO Mask Interrupt A Clear Registers" on
page 9-38
"GPIO Mask Interrupt A Set Registers" on
page 9-36
"GPIO Mask Interrupt A Toggle Registers" on
page 9-40
"GPIO Mask Interrupt B Registers" on
page 9-35
"GPIO Mask Interrupt B Clear Registers" on
page 9-39
"GPIO Mask Interrupt B Set Registers" on
page 9-37
"GPIO Mask Interrupt B Toggle Registers" on
page 9-41
"GPIO Direction Registers" on page 9-30
"GPIO Polarity Registers" on page 9-33
"Interrupt Sensitivity Registers" on page 9-34
"GPIO Set on Both Edges Registers" on
page 9-34
"GPIO Input Enable Registers" on page 9-31
A-9