System Reset And Interrupt Control Registers - Analog Devices ADSP-BF506F Hardware Reference Manual

System Reset and Interrupt Control Registers

System Reset and Interrupt Control
Registers
System reset and interrupt control registers (0xFFC0 0100 –
0xFFC0 01FF) are listed in
Table A-4. System Reset and Interrupt Control Registers
Memory-Mapped
Address
0xFFC0 0104
0xFFC0 010C
0xFFC0 014C
0xFFC0 0110
0xFFC0 0114
0xFFC0 0118
0xFFC0 011C
0xFFC0 0150
0xFFC0 0154
0xFFC0 0158
0xFFC0 0120
0xFFC0 0160
A-4
Table
Register
Name
SYSCR
SIC_IMASK0
SIC_IMASK1
SIC_IAR0
SIC_IAR1
SIC_IAR2
SIC_IAR3
SIC_IAR4
SIC_IAR5
SIC_IAR6
SIC_ISR0
SIC_ISR1
ADSP-BF50x Blackfin Processor Hardware Reference
A-4.
For individual bits, see this diagram:
"System Reset Configuration (SYSCR) Regis-
ter" on page 24-61
"System Interrupt Mask (SIC_IMASK) Regis-
ter" on page 4-12
"System Interrupt Mask (SIC_IMASK) Regis-
ter" on page 4-12
"System Interrupt Assignment (SIC_IAR) Reg-
ister" on page 4-11
"System Interrupt Assignment (SIC_IAR) Reg-
ister" on page 4-11
"System Interrupt Assignment (SIC_IAR) Reg-
ister" on page 4-11
"System Interrupt Assignment (SIC_IAR) Reg-
ister" on page 4-11
"System Interrupt Assignment (SIC_IAR) Reg-
ister" on page 4-11
"System Interrupt Assignment (SIC_IAR) Reg-
ister" on page 4-11
"System Interrupt Assignment (SIC_IAR) Reg-
ister" on page 4-11
"System Interrupt Status (SIC_ISR) Register"
on page 4-12
"System Interrupt Status (SIC_ISR) Register"
on page 4-12