Analog Devices ADSP-BF506F Hardware Reference Manual page 1230

UART Controller Registers
Table A-19. UART0 Controller Registers (Cont'd)
Memory-Mapped
Address
0XFFC0 040C
0XFFC0 0410
0XFFC0 0414
0XFFC0 0418
0XFFC0 041C
0XFFC0 0420
0XFFC0 0424
0XFFC0 0428
0XFFC0 042C
Table A-20. UART1 Controller Registers
Memory-Mapped
Address
0XFFC0 2000
0XFFC0 2004
0XFFC0 2008
0XFFC0 200C
0XFFC0 2010
0XFFC0 2014
0XFFC0 2018
0XFFC0 201C
0XFFC0 2020
A-24
Register Name
UART0_LCR
UART0_MCR
UART0_LSR
UART0_MSR
UART0_SCR
UART0_IER_SET
UART0_IER_CLEAR
UART0_THR
UART0_RBR
Register Name
UART1_DLL
UART1_DLH
UART1_GCTL
UART1_LCR
UART1_MCR
UART1_LSR
UART1_MSR
UART1_SCR
UART1_IER_SET
ADSP-BF50x Blackfin Processor Hardware Reference
For individual bits, see this diagram:
"UARTx_LCR Registers" on page 15-28
"UARTx_MCR Registers" on page 15-31
"UARTx_LSR Registers" on page 15-33
"UARTx_MSR Registers" on page 15-36
"UARTx_SCR Registers" on page 15-44
"UARTx_IER_SET and UARTx_IER_CLEAR
Registers" on page 15-39
"UARTx_IER_SET and UARTx_IER_CLEAR
Registers" on page 15-39
"UARTx_THR Registers" on page 15-37
"UARTx_RBR Registers" on page 15-38
For individual bits, see this diagram:
"UARTx_DLL and UARTx_DLH Registers"
on page 15-43
"UARTx_DLL and UARTx_DLH Registers"
on page 15-43
"UARTx_GCTL Registers" on page 15-45
"UARTx_LCR Registers" on page 15-28
"UARTx_MCR Registers" on page 15-31
"UARTx_LSR Registers" on page 15-33
"UARTx_MSR Registers" on page 15-36
"UARTx_SCR Registers" on page 15-44
"UARTx_IER_SET and UARTx_IER_CLEAR
Registers" on page 15-39