Analog Devices ADSP-BF506F Hardware Reference Manual page 1304

Adsp-bf50x blackfin processor
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Index
TFSR (transmit frame sync required select)
bit, 19-31, 19-32, 19-48,
TFS signal,
19-19
TFSx signal,
19-5
THRE bit, 15-16,
15-35
THRE flag, 15-7,
15-22
THRE (transmit hold register empty) bit,
15-34
throughput
DAB,
3-10
DMA,
7-42
from DMA system,
7-41
general-purpose ports,
SPORT,
19-7
TIMDISx bit, 10-37,
10-38
time-division-multiplexed (TDM) mode,
19-15
See also SPORT, multichannel operation
TIMENx bit, 10-36,
10-37
time quantum (TQ),
17-10
timer configuration (TIMERx_CONFIG)
registers, 10-5, 10-41,
timer counter[15:0] field,
timer counter[31:16] field,
timer counter (TIMERx_COUNTER)
registers, 10-4, 10-42,
TIMER_DISABLE bit,
TIMER_DISABLE (timer disable) register,
10-5,
10-38
timer disable (TIMER_DISABLE) register,
10-5,
10-38
TIMER_ENABLE bit,
TIMER_ENABLE (timer enable) register,
10-5, 10-36, 10-37,
timer enable (TIMER_ENABLE) register,
10-5, 10-36,
10-37
timer input select (TIN_SEL) bit, 10-42,
10-47
timer interrupt (TIMILx) bits, 10-4,
timer period[15:0] field,
I-40
19-51
9-12
10-42
10-43
10-43
10-43
10-46
10-46
20-23
10-40
10-45
ADSP-BF50x Blackfin Processor Hardware Reference
timer period[31:16] field,
timer period (TIMERx_PERIOD)
registers, 10-4, 10-44,
timers,
10-1
to
10-58
core,
11-1
to
11-8
EXT_CLK mode,
10-33
overview,
1-18
watchdog, 1-23,
12-1
WDTH_CAP mode,
TIMER_STATUS (timer status) register,
10-5, 10-39,
10-40
timer status (TIMER_STATUS) register,
10-5, 10-39,
10-40
timer width[15:0] field,
timer width[31:16] field,
timer width (TIMERx_WIDTH) registers,
10-44,
10-46
TIMERx_CONFIG (timer configuration)
registers, 10-5, 10-41,
TIMERx_COUNTER (timer counter)
registers, 10-4, 10-42,
TIMERx_PERIOD (timer period)
registers, 10-4, 10-44,
TIMERx_WIDTH (timer width) registers,
10-44,
10-46
time stamps, CAN,
17-20
TIMILx (timer interrupt) bits, 10-4,
timing
memory DMA,
7-45
multichannel transfer,
peripherals,
3-4
SPI,
18-6
timing examples, for SPORTs,
timing parameters, CAN,
TIMOD[1:0] field, 18-17, 18-19, 18-36,
18-37
TIN_SEL (timer input select) bit, 10-42,
10-47
TINT bit, 11-3,
11-5
TLSBIT (bit order select) bit, 19-48,
10-45
10-45
to
12-10
15-22
10-46
10-46
10-42
10-43
10-45
10-40
19-17
19-39
17-11
19-50

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