Avaya S8700 Maintenance Manual page 1074

Maintenance-Object Repair Procedures
Receive FIFO Overflow Error Counter Test (#625)
This test reads and clears the BRI port's Receive FIFO Overflow error counter
maintained on the BRI-LINE circuit pack. This counter is incremented by the
circuit pack when it detects an overflow of its receive buffers. The test passes if
the value of the counter is 0 (that is, the error is cleared). If the counter is
non-zero, the test fails, and the value of the counter is displayed in the Error Code
field.
This error can occur if signaling frames are being received from the packet bus at
a rate sufficient to overflow the receive buffers on the circuit pack for a port OR if a
hardware fault is causing the receive buffers not to be emptied properly by the
circuit pack. This test is useful for verifying the repair of the problem.
Table 8-150. Test #625 Receive FIFO Overflow Error Counter Test
Error Test
Code Result Description / Recommendation
2000 ABORT Response to the test was not received from the circuit pack within the allowable
time period.
1. If the test aborts repeatedly up to five times, reset the circuit pack via the
2. If the test aborts again, replace the circuit pack.
2012 ABORT Internal system error.
2100 ABORT Could not allocate the necessary system resources to run this test.
1. Retry the command at 1-minute intervals up to 5 times.
2. If the test continues to fail, escalate the problem.
value FAIL The BRI-LINE circuit pack is still detecting errors of this type. The Error Code
field contains the value of this counter.
1. Retry the command at 1-minute intervals up to 5 times.
2. If the test continues to fail, run the long test sequence, and pay particular
3. Replace the circuit pack.
PASS The Receive FIFO Overflow error counter was read correctly and has a value
of 0.
8-352 Issue 1 May 2002
busyout board PCSS and reset board PCSS commands.
attention to the Loop Around tests (#618 and #619). See the repair
procedures for the executed test if it fails. Otherwise, go to the next step.
Continued on next page
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