Ethernet Phy Management Register 4 - Auto-Negotiation Advertisement (Mr4) Register; Ethernet Phy Management Register 4 - Auto-Negotiation Advertisement (Mr4) Register Field Descriptions - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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19.7.5 Ethernet PHY Management Register 4 – Auto-Negotiation Advertisement (MR4)
Register, address 0x04
The Ethernet PHY Management Register 4 – Auto-Negotiation Advertisement (MR4) register provides the
advertised abilities of the Ethernet PHY used during auto-negotiation. Bits 8:5 represent the Technology
Ability Field bits. This field can be overwritten by software to auto-negotiate to an alternate common
technology. Writing to this register has no effect until auto-negotiation is re-initiated by setting the RANEG
bit in the MR0 register.
Figure 19-25. Ethernet PHY Management Register 4 – Auto-Negotiation Advertisement (MR4)
15
14
NP
Reserved
R-0
R-0
7
6
A2
A1
R/W-1
R/W-1
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 19-24. Ethernet PHY Management Register 4 – Auto-Negotiation Advertisement (MR4)
Bit
Field
15
NP
14
Reserved
13
RF
12-9
Reserved
8
A3
7
A2
6
A1
5
A0
4-0
S
SPRUHE8E – October 2012 – Revised November 2019
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13
12
RF
R/W-0
5
4
A0
R/W-1
Register Field Descriptions
Value
Description
Next Page
0
The Ethernet PHY is not capable of Next Page exchanges.
1
The Ethernet PHY is capable of Next Page exchanges to provide more detailed information on the
PHY layer's capabilities.
Reserved
Remote Fault
0
No Remote Fault condition has been encountered.
1
Indicates to the link partner that a Remote Fault condition has been encountered.
Reserved
Technology Ability Field [3]
0
The Ethernet PHY does not support the 100Base-TX full-duplex signaling protocol.
1
The Ethernet PHYr supports the 100Base-TX full-duplex signaling protocol. If software wants to
ensure that this mode is not used, this bit can be cleared and auto-negotiation re-initiated with the
RANEG bit in the MR0 register.
Technology Ability Field [2]
0
The Ethernet PHY does not support the 100Base-TX half-duplex signaling protocol.
1
The Ethernet PHY supports the 100Base-TX half-duplex signaling protocol. If software wants to
ensure that this mode is not used, this bit can be cleared and auto-negotiation re-initiated with the
RANEG bit in the MR0 register.
Technology Ability Field [1]
0
The Ethernet PHY does not support the 10BASE-T full-duplex signaling protocol.
1
The Ethernet PHY supports the 10BASE-T full-duplex signaling protocol. If software wants to
ensure that this mode is not used, this bit can be cleared and auto-negotiation re-initiated with the
RANEG bit in the MR0 register.
Technology Ability Field [0]
0
The Ethernet PHY does not support the 10BASE-T half-duplex signaling protocol.
1
The Ethernet PHY supports the 10BASE-T half-duplex signaling protocol. If software wants to
ensure that this mode is not used, this bit can be cleared and auto-negotiation re-initiated with the
RANEG bit in the MR0 register.
Selector Field
1h
This field encodes 32 possible messages for communicating between Ethernet PHYs.
Copyright © 2012–2019, Texas Instruments Incorporated
MII Management Register Descriptions
Register
Reserved
R-0
S
R-1
M3 Ethernet Media Access Controller (EMAC)
9
8
A3
R/W-1
0
1443

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