Filtering Of Short Dominant Spikes - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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The phase buffer segments are lengthened or shortened temporarily only; at the next bit time, the
segments return to their nominal programmed values.
In these examples, the bit timing is seen from the point of view of the CAN implementation's state
machine, where the bit time starts and ends at the sample points. The state machine omits Sync_Seg
when synchronizing on an "early" edge because it cannot subsequently redefine that time quantum of
Phase_Seg2 where the edge occurs to be the Sync_Seg.
The examples in Figure 23-14
both examples, the spike starts at the end of Prop_Seg and has the length of (Prop_Seg + Phase_Seg1).
In the first example, the synchronization jump width is greater than or equal to the phase error of the
spike's edge from recessive to dominant. Therefore the sample point is shifted after the end of the spike; a
recessive bus level is sampled.
In the second example, SJW is shorter than the phase error, so the sample point cannot be shifted far
enough; the dominant spike is sampled as actual bus level.
Rx-input
SJW >= phase error
Rx-Input
SJW < phase error
23.12.1.4 Oscillator Tolerance Range
With the introduction of CAN protocol version 1.2, the option to synchronize on edges from dominant to
recessive became obsolete. Only edges from recessive to dominant are considered for synchronization.
The protocol update to version 2.0 (A and B) had no influence on the oscillator tolerance.
The tolerance range df for an oscillator's frequency f
(1 - df) • f ≤ f ≤(1 + df) • f
nom osc
depends on the proportions of Phase_Seg1, Phase_Seg2, SJW, and the bit time. The maximum tolerance
df is the defined by two conditions (both shall be met):
SPRUHE8E – October 2012 – Revised November 2019
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show how short dominant noise spikes are filtered by synchronizations. In
Figure 23-14. Filtering of Short Dominant Spikes
Spike
Sample-point
Spike
Sample-point
Sync_Seg
Prop_Seg
nom
≤ -----------------------------------------------------------------------
I: df
2x (13x (bit_time – TSeg2))
II: df
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Sample-point
Phase_Seg1
around the nominal frequency f
osc
,
min TSeg1 Tseg2) )
SJW
≤
------------------------ -
20xbit_time
CAN Bit Timing
Recessive
dominant
Sample-point
Recessive
dominant
Phase_Seg2
with
nom
M3 Controller Area Network (CAN)
(11)
(12)
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