Master Single Transmit - Texas Instruments Concerto F28M36 Series Technical Reference Manual

Functional Description
1528
M3 Inter-Integrated Circuit (I2C) Interface
Figure 22-7. Master Single TRANSMIT
Write Slave
Address and
Transmit Bit to
I2CMSA
Write data to
I2CMDR
Read I2CMCS
NO
BUSBSY bit=0?
Write 0111
to I2CMCS
Read I2CMCS
NO
BUSY bit=0?
NO
Error Service ERROR bit=0?
Copyright © 2012–2019, Texas Instruments Incorporated
Idle
Sequence
may be
omitted in a
Single Master
system
YES
YES
YES
Idle
SPRUHE8E – October 2012 – Revised November 2019
www.ti.com
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