Faults - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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24.8 Fault Handling
Faults are a subset of the exceptions (see
A bus error on an instruction fetch or vector table load or a data access.
An internally detected error such as an undefined instruction or an attempt to change state with a BX
instruction.
Attempting to execute an instruction from a memory region marked as Non-Executable (XN).
An MPU fault because of a privilege violation or an attempt to access an unmanaged region.
24.8.1 Fault Types
Table 24-19
shows the types of fault, the handler used for the fault, the corresponding fault status register,
and the register bit that indicates the fault has occurred. See the Cortex-M3 Peripherals chapter for more
information about the fault status registers.
Fault
Bus error on a vector read
Fault escalated to a hard fault
MPU or default memory
mismatch on instruction access
MPU or default memory
mismatch on data access
MPU or default memory
mismatch on exception
stacking
MPU or default memory
mismatch on exception
unstacking
Bus error during exception
stacking
Bus error during exception
unstacking
Bus error during instruction
prefetch
Precise data bus error
Imprecise data bus error
Attempt to access a
coprocessor
Undefined instruction
Attempt to enter an invalid
(2)
instruction set state
Invalid EXC_RETURN value
Illegal unaligned load or store
Divide by 0
(1)
Occurs on an access to an XN region even if the MPU is disabled.
(2)
Attempting to use an instruction set other than the Thumb instruction set, or returning to a non load-store-multiple instruction with
ICI continuation
SPRUHE8E – October 2012 – Revised November 2019
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Section
24.7.)The following conditions generate a fault:
Table 24-19. Faults
Handler
Hard fault
Hard fault
Memory management fault
Memory management fault
Memory management fault
Memory management fault
Bus fault
Bus fault
Bus fault
Bus fault
Bus fault
Usage fault
Usage fault
Usage fault
Usage fault
Usage fault
Usage fault
Copyright © 2012–2019, Texas Instruments Incorporated
Fault Status Register
Hard Fault Status
(HFAULTSTAT)
Hard Fault Status
(HFAULTSTAT)
Memory Management Fault
Status (MFAULTSTAT)
Memory Management Fault
Status (MFAULTSTAT)
Memory Management Fault
Status (MFAULTSTAT)
Memory Management Fault
Status (MFAULTSTAT)
Bus Fault Status
(BFAULTSTAT)
Bus Fault Status
(BFAULTSTAT)
Bus Fault Status
(BFAULTSTAT)
Bus Fault Status
(BFAULTSTAT)
Bus Fault Status
(BFAULTSTAT)
Usage Fault Status
(UFAULTSTAT)
Usage Fault Status
(UFAULTSTAT)
Usage Fault Status
(UFAULTSTAT)
Usage Fault Status
(UFAULTSTAT)
Usage Fault Status
(UFAULTSTAT)
Usage Fault Status
(UFAULTSTAT)
Fault Handling
Bit Name
VECT
FORCED
(1)
IERR
DERR
MSTKE
MUSTKE
BSTKE
BUSTKE
IBUS
PRECISE
IMPRE
NOCP
UNDEF
INVSTAT
INVPC
UNALIGN
DIV0
1629
Cortex-M3 Processor

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