Can Block Diagram - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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23.1.3 Block Diagram
CAN
Message
RAM
Message
Objects
(Mailboxes)
23.1.3.1 CAN Core
The CAN core consists of the CAN Protocol Controller and the Rx/Tx Shift register. It handles all ISO
11898-1 protocol functions.
23.1.3.2 Message Handler
The message handler is a state machine which controls the data transfer between the single ported
Message RAM and the CAN Core's Rx/Tx Shift register. It also handles acceptance filtering and the
interrupt request generation as programmed in the control registers.
23.1.3.3 Message RAM
The CAN message RAM enables the storage of 32 CAN messages.
23.1.3.4 Registers and Message Object Access (IFx)
Data consistency is ensured by indirect accesses to the message objects. During normal operation, all
CPU accesses to the message RAM are done through Interface registers.
SPRUHE8E – October 2012 – Revised November 2019
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Figure 23-1. CAN Block Diagram
Message
32 RAM
Interface
Copyright © 2012–2019, Texas Instruments Incorporated
CAN_RX CAN_TX
CAN Core
Message Handler
Registers and Message
Object Access (IFx)
Test Modes
only
Module Interface
CPU Bus
(8, 16 or 32 bit)
M3 Controller Area Network (CAN)
Overview
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