If1 And If2 Command Register Field Descriptions - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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Bit Field
31-24 Reserved
23 WR/RD
22 Mask
21 Arb
20 Control
19 ClrIntPnd
18 TxRqst/NewDat
17 Data A
SPRUHE8E – October 2012 – Revised November 2019
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Table 23-18. IF1 and IF2 Command Register Field Descriptions
Value Description
Reserved
Write/Read
0 Direction = Read: Transfer direction is from the message object addressed by Message
Number (Bits [7:0]) to the IF1 or IF2 register set.
1 Direction = Write: Transfer direction is from the IF1 or IF2 register set to the message object
addressed by Message Number (Bits [7:0])
Access Mask Bits
0 Mask bits will not be changed
1 Direction = Read: The Mask bits (Identifier Mask + MDir + MXtd) will be transferred from the
message object addressed by Message Number (Bits [7:0]) to the IF1 or IF2 Register set.
Direction = Write: The Mask bits (Identifier Mask + MDir + MXtd) will be transferred from the
IF1 or IF2 register set to the message object addressed by Message Number (Bits [7:0]).
Access Arbitration Bits
0 Arbitration bits will not be changed
1 Direction = Read: The Arbitration bits (Identifier + Dir + Xtd + MsgVal) will be transferred from
the message object addressed by Message Number (Bits [7:0]) to the corresponding IF1 or
IF2 register set.
Direction = Write: The Arbitration bits (Identifier + Dir + Xtd + MsgVal) will be transferred from
the IF1 or IF2 register set to the mes-sage object addressed by Message Number (Bits [7:0]).
Access Control Bits
0 Control bits will not be changed
1 Direction = Read: The Message Control bits will be transferred from the message object
addressed by Message Number (Bits [7:0]) to the IF1 or IF2 register set.
Direction = Write: The Message Control bits will be transferred from the IF1 or IF2 register set
to the message object addressed by Message Number (Bits [7:0]). If the TxRqst/NewDat bit in
this register (Bit [18]) is set, the TxRqst/ NewDat bit in the IF1 or IF2 Message Control register
will be ignored.
Clear Interrupt Pending Bit
0 IntPnd bit will not be changed
1 Direction = Read: Clears IntPnd bit in the message object.
Direction = Write: This bit is ignored. Copying of IntPnd flag from IF1 or IF2 registers to
Message RAM can only be controlled by the Control flag (Bit [20]).
Access Transmission Request Bit
0 Direction = Read: NewDat bit will not be changed. Direction = Write: TxRqst/NewDat bit will be
handled according to the Control bit.
1 Direction = Read: Clears NewDat bit in the message object. Direction = Write: Sets
TxRqst/NewDat in message object.
Note: If a CAN transmission is requested by setting TxRqst/NewDat in this register, the
TxRqst/NewDat bits in the message object will be set to one independent of the values in the
IF1 or IF2 Message Control register.
Note: A read access to a message object can be combined with the reset of the control bits
IntPnd and NewDat. The values of these bits transferred to the IF1 or IF2 Message Control
register always reflect the status before resetting them.
Access Data Bytes 0-3
0 Data Bytes 0-3 will not be changed.
1 Direction = Read: The Data Bytes 0-3 will be transferred from the message object addressed
by the Message Number (Bits [7:0]) to the corresponding IF1 or IF2 register set.
Direction = Write: The Data Bytes 0-3 will be transferred from the IF1 or IF2 register set to the
message object addressed by the Message Number (Bits [7:0]).
Note: The duration of the message transfer is independent of the number of bytes to be
transferred.
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CAN Control Registers
M3 Controller Area Network (CAN)
1593