Interrupt 128-133 Clear Pending (Unpend4) Register; Interrupt 0-31 Active Bit (Active0) Register; Interrupt 128-133 Clear Pending (Unpend4) Register Field Descriptions; Interrupt 0-31 Active Bit (Active0) Register Field Descriptions - Texas Instruments Concerto F28M36 Series Technical Reference Manual

NVIC Register Descriptions
25.5.20 Interrupt 128-133 Clear Pending (UNPEND4) Register, offset 0x290
The Interrupt 128-133 Clear Pending (UNPEND4) register shows which interrupts are pending and
removes the pending state from interrupts. Bit 0 corresponds to Interrupt 128; bit 5 corresponds to
Interrupt 133. See the Cortex-M3 Processor chapter for interrupt assignments.
Note: This register can only be accessed from privileged mode.
Figure 25-24. Interrupt 128-133 Clear Pending (UNPEND4) Register
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 25-30. Interrupt 128-133 Clear Pending (UNPEND4) Register Field Descriptions
Bit Field
31-6 Reserved
5-0 INT
25.5.21 Interrupt 0-31 Active Bit (ACTIVE0) Register, offset 0x300
The Interrupt 0-31 Active Bit (ACTIVE0) register indicates which interrupts are active. Bit 0 corresponds to
Interrupt 0; bit 31 corresponds to Interrupt 31. See the Cortex-M3 Processor chapter for interrupt
assignments.
Note: This register can only be accessed from privileged mode.
Caution: Do not manually set or clear the bits in this register.
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 25-31. Interrupt 0-31 Active Bit (ACTIVE0) Register Field Descriptions
Bit Field
31-0 INT
1660
Cortex-M3 Peripherals
Reserved
R-0
Value Description
Reserved
Interrupt Clear Pending
0 On a read, indicates that the interrupt is not pending. On a write, no effect.
1 On a read, indicates that the interrupt is pending. On a write, clears the corresponding INT[n] bit in
the PEND2 register, so that interrupt [n] is no longer pending. Setting a bit does not affect the
active state of the corresponding interrupt
Figure 25-25. Interrupt 0-31 Active Bit (ACTIVE0) Register
Value Description
Interrupt Active
0 The corresponding interrupt is not active.
1 The corresponding interrupt is active, or active and pending.
Copyright © 2012–2019, Texas Instruments Incorporated
INT
R-0
SPRUHE8E – October 2012 – Revised November 2019
www.ti.com
6 5 0
INT
R/W-0
0
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