ST STM32F301 6 Series Reference Manual page 868

Revision history
Date
21-Jul-2016
868/874
Table 128. Document revision history (continued)
Revision
Updated I2C2 section:
– Updated Figure 248: Setup and hold timings.
– Updated Section 48.4.5: I2C initialization updating and adding notes
in Section : I2C timings.
– Updated Section 33.7.5: Timing register
(I2C_TIMINGRFMPI2C_TIMINGR) SCLDEL[3:0] and SDADEL[3:0]
bits description.
– Updated Section 48.4.5: I2C initialization, Section 25.4.9: I2C
controller mode and Section 33.7.5: Timing register
(I2C_TIMINGRFMPI2C_TIMINGR) adding the sentence "The
STM32CubeMX tool calculates and provides the I2C_TIMIGR
content in the I2C configuration window".
Updated Touch sensing controller section:
– Updated Section 16.4.4: Charge transfer acquisition sequence
adding note about the TSC control register configuration forbidden.
– Updated Section 16.7.1: TSC control register (TSC_CR) adding note
for CTPL[3:0] bits and PGPSC[2:0] bits.
Updated USART section:
– Updated Section 26.5.17: Wake-up from Stop mode using USART
adding paragraph "how to determine the maximum USART
4
baudrate".
– Updated whole USART document replacing any occurrence of:
nCTS by CTS, nRTS by RTS, SCLK by CK.
– Updated Section 26.8.9: USART interrupt flag clear register
(USART_ICR) replacing "w" by "rc_wl".
– Updated Section 26.8.8: USART interrupt and status register
(USART_ISR) RTOF field replacing USARTx_CR2 by
USARTx_CR1.
– Updated Section 26.8.3: USART control register 3 (USART_CR3)
'ONEBIT' bit 11 description adding a note.
– Updated Section 26: Universal synchronous/asynchronous receiver
transmitter (USART/UART) changing register name
USARTx_regname in USART_regname.
– Changed tWUSTOP to tWUUSART and updated Section 26.5.5:
Tolerance of the USART receiver to clock deviation.
– Added Section : Determining the maximum USART baud rate
allowing to wake up correctly from Stop mode when the USART
clock source is the HSI clock.
– Updated Section 26.5.17: Wake-up from Stop mode using USART
adding paragraph about USART/LPUART HSI or LSE source clocks.
RM0366 Rev 5
Changes
RM0366