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ST STM32F301 6 Series Reference Manual page 523

Advanced arm-based 32-bit mcus

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RM0366
19.4.14
6-step PWM generation
When complementary outputs are used on a channel, preload bits are available on the
OCxM, CCxE and CCxNE bits. The preload bits are transferred to the shadow bits at the
COM commutation event. Thus one can program in advance the configuration for the next
step and change the configuration of all the channels at the same time. COM can be
generated by software by setting the COM bit in the TIMx_EGR register or by hardware (on
tim_trgi rising edge).
A flag is set when the COM event occurs (COMIF bit in the TIMx_SR register), which can
generate an interrupt (if the COMIE bit is set in the TIMx_DIER register) or a DMA request
(if the COMDE bit is set in the TIMx_DIER register).
The
Figure 224
event occurs, in 3 different examples of programmed configurations.
Counter (CNT)
tim_ocxref
COM event
tim_ocx
Example 1
tim_ocxn
tim_ocx
Example 2
tim_ocxn
tim_ocx
Example 3
tim_ocxn
describes the behavior of the tim_ocx and tim_ocxn outputs when a COM
Figure 224. 6-step generation, COM example (OSSR=1)
CCxE = 1
CCxNE = 0
OCxM = 0010 (forced inactive)
CCxE = 1
CCxNE = 0
OCxM = 0100 (forced inactive)
CCxE = 1
CCxNE = 0
OCxM = 0010 (forced inactive)
General-purpose timers (TIM15/TIM16/TIM17)
Write COM to 1
Write OCxM to 0100
Write CCxNE to 1
and OCxM to 0101
Write CCxNE to 0
and OCxM to 0100
RM0366 Rev 5
CCxE = 1
CCxNE = 0
OCxM = 0100
CCxE = 0
CCxNE = 1
OCxM = 0101
CCxE = 1
CCxNE = 1
OCxM = 0100
MSv62343V1
523/874
574

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