ST STM32F301 6 Series Reference Manual page 298

Comparator (COMP)
Bits 6:4 COMP2INMSEL[2:0]: Comparator 2 inverting input selection
These bits allows to select the source connected to the inverting input of the comparator 2.
000: 1/4 of Vrefint
001: 1/2 of Vrefint
010: 3/4 of Vrefint
011: Vrefint
100: PA4 or DAC1_CH1 output if enabled
110: PA2
Remaining combinations: reserved.
Bit 1 COMP2_INP_DAC: Comparator 2 non inverting input connection to DAC output.
This bit closes a switch between comparator 2 non-inverting input and DAC out I/O.
0: Switch open
1: Switch closed
This switch is solely intended to redirect signals onto high impedance input, such as COMP2 non-
inverting input (highly resistive switch)
Bit 0 COMP2EN: Comparator 2 enable
This bit switches COMP2 ON/OFF.
0: Comparator 2 disabled
1: Comparator 2 enabled
14.5.2 COMP4 control and status register (COMP4_CSR)
Address offset: 0x28
Reset value: 0x0000 0000
31 30 29 28
COMP COMP
Res. Res.
4LOCK 4OUT
rwo r
15 14 13 12
COMP
Res. COMP4OUTSEL[3:0]
4POL
rw rw rw
Bit 31 COMP4LOCK: Comparator 4 lock
This bit is write-once. It is set by software. It can only be cleared by a system reset.
It allows to have COMP4_CSR register as read-only.
0: COMP4_CSR is read-write.
1: COMP4_CSR is read-only.
Bit 30 COMP4OUT: Comparator 4 output
This read-only bit is a copy of comparator 4 output state.
0: Output is low (non-inverting input below inverting input).
1: Output is high (non-inverting input above inverting input).
Bits 29: Reserved, must be kept at reset value.
298/874
27 26 25 24
Res. Res. Res. Res.
11 10 9 8
Res. Res.
rw rw
RM0366 Rev 5
23 22 21 20
Res. Res Res. COMP4_BLANKING[2:0]
rw
7 6 5 4
Res. COMP4INMSEL[2:0]
rw rw rw
RM0366
19 18 17 16
Res.
rw rw rw rw
3 2 1 0
COMP4
Res. Res.
EN
rw