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ST STM32F301 6 Series Reference Manual page 681

Advanced arm-based 32-bit mcus

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RM0366
Parameter
PRESC[3:0]
SCLL[7:0]
t
200 x 250 ns = 50 µs
SCLL
SCLH[7:0]
t
196 x 250 ns = 49 µs
SCLH
(1)
t
~100 µs
SCL
SDADEL[3:0]
t
2 x 250 ns = 500 ns
SDADEL
SCLDEL[3:0]
t
5 x 250 ns = 1250 ns
SCLDEL
1. t
is greater than t
SCL
SCLL
2. t
t
minimum value is 4x t
SYNC1 +
SYNC2
3. t
t
minimum value is 4x t
SYNC1 +
SYNC2
4. t
t
minimum value is 4x t
SYNC1 +
SYNC2
25.4.11
SMBus specific features
Introduction
The system management bus (SMBus) is a two-wire interface through which various
devices can communicate with each other and with the rest of the system. It is based on
operation principles of the I²C-bus. The SMBus provides a control bus for system and power
management related tasks.
The I2C peripheral is compatible with the SMBus specification (http://smbus.org).
The system management bus specification refers to three types of devices:
Target is a device that receives or responds to a command.
Controller is a device that issues commands, generates clocks, and terminates the
transfer.
Host is a specialized controller that provides the main interface to the system CPU. A
host must be a controller-target and must support the SMBus host notify protocol. Only
one host is allowed in a system.
The I2C peripheral can be configured as a controller or a target device, and also as a host.
Bus protocols
There are eleven possible command protocols for any given device. The device can use any
or all of them to communicate. These are: Quick Command, Send Byte, Receive Byte, Write
Byte, Write Word, Read Byte, Read Word, Process Call, Block Read, Block Write, and Block
Write-Block Read Process Call. The protocols must be implemented by the user software.
Table 90. Timing settings for
Standard-mode (Sm)
10 kHz
0xB
0xC7
20 x 250 ns = 5.0 µs
0xC3
16 x 250 ns = 4.0 µs
(2)
0x2
2 x 250 ns = 500 ns
0x4
5 x 250 ns = 1250 ns
+ t
due to the SCL internal detection delay. Values provided for t
SCLH
= 83.3 ns. Example with t
I2CCLK
= 83.3 ns. Example with t
I2CCLK
= 83.3 ns. Example with t
I2CCLK
Inter-integrated circuit interface (I2C)
f
I2CCLK
Fast-mode (Fm)
100 kHz
0xB
0x13
10 x 125 ns = 1250 ns
0xF
4 x 125 ns = 500 ns
(2)
~10 µs
0x2
3 x 125 ns = 375 ns
0x4
4 x 125 ns = 500 ns
SYNC1 +
SYNC1 +
SYNC1 +
RM0366 Rev 5
of 48 MHz
Fast-mode Plus (Fm+)
400 kHz
0x5
0x9
4 x 125 ns = 500 ns
0x3
2 x 125 ns = 250 ns
(3)
~2.5 µs
0x3
0x3
2 x 125 ns = 250 ns
are only examples.
SCL
t
= 1000 ns
SYNC2
t
= 750 ns
SYNC2
t
= 250 ns
SYNC2
1000 kHz
0x5
0x3
0x1
(4)
~875 ns
0x0
0 ns
0x1
681/874
711

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