ST STM32F301 6 Series Reference Manual page 321

RM0366
In order to improve the system immunity, the Schmitt trigger hysteresis of the GPIOs
controlled by the TSC must be disabled by resetting the corresponding Gx_IOy bit in the
TSC_IOHCR register.
16.4 TSC low-power modes
Mode
Sleep
Stop
Standby
16.5 TSC interrupts
Interrupt event
End of acquisition
Max count error
16.6 TSC registers
Refer to
descriptions.
The peripheral registers can be accessed by words (32-bit).
16.6.1 TSC control register (TSC_CR)
Address offset: 0x00
Reset value: 0x0000 0000
31 30 29
CTPH[3:0]
rw rw rw
15 14 13
SSPSC PGPSC[2:0]
rw rw rw
Table 55. Effect of low-power modes on TSC
No effect
TSC interrupts cause the device to exit Sleep mode.
TSC registers are frozen
The TSC stops its operation until the Stop or Standby mode is exited.
Table 56. Interrupt control bits
Enable
Event flag
control bit
EOAIE EOAIF
MCEIE MCEIF
Section 1.2 of the reference manual for a list of abbreviations used in register
28 27 26 25
CTPL[3:0]
rw rw rw rw
12 11 10 9
Res. Res. Res.
rw
Description
Clear flag Exit the
bit Sleep mode
EOAIC Yes
MCEIC Yes
24 23 22
rw rw rw
8 7 6
Res. MCV[2:0]
rw rw
RM0366 Rev 5
Touch sensing controller (TSC)
Exit the
Stop mode
No
No
21 20 19 18
SSD[6:0]
rw rw rw rw
5 4 3 2
SYNC
IODEF AM
POL
rw rw rw rw
Exit the
Standby mode
No
No
17 16
SSE
rw rw
1 0
START TSCE
rw rw
321/874
330