ST STM32F301 6 Series Reference Manual page 334

Advanced-control timer (TIM1)
1. The internal break event source can be:
- A clock failure event generated by CSS. For further information on the CSS, refer to
Clock security system (CSS)
- A PVD output
- SRAM parity error signal
- Cortex
- COMP Output.
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-M4F LOCKUP (Hardfault) output.
RM0366 Rev 5
RM0366
Section 7.2.7: