ST STM32F301 6 Series Reference Manual page 343

RM0366 Advanced-control timer (TIM1)
Figure 103. Counter timing diagram, internal clock divided by 4
CK_PSC
CNT_EN
Timerclock = CK_CNT
Counter register
0001
0000 0000 0001
Counter underflow
Update event (UEV)
Update interrupt flag
(UIF)
MS31186V1
Figure 104. Counter timing diagram, internal clock divided by N
CK_PSC
Timerclock = CK_CNT
20 1F 00 36
Counter register
Counter underflow
Update event (UEV)
Update interrupt flag
(UIF)
MS31187V1
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