ST STM32F301 6 Series Reference Manual page 698

Inter-integrated circuit interface (I2C)
25.9 I2C registers
Refer to
The registers are accessed by words (32-bit).
25.9.1 I2C control register 1 (I2C_CR1)
Address offset: 0x00
Reset value: 0x0000 0000
Access: no wait states, except if a write access occurs while a write access is ongoing. In
this case, wait states are inserted in the second write access, until the previous one is
completed. The latency of the second write access can be up to 2 x PCLK1 + 6 x I2CCLK.
31 30 29
Res. Res. Res. Res.
15 14 13
RXDM TXDMA ANF
Res.
AEN EN OFF
rw rw
Bits 31:24 Reserved, must be kept at reset value.
Bit 23 PECEN: PEC enable
Bit 22 ALERTEN: SMBus alert enable
Note: When ALERTEN = 0, the SMBA pin can be used as a standard GPIO.
Bit 21 SMBDEN: SMBus device default address enable
Bit 20 SMBHEN: SMBus host address enable
Bit 19 GCEN: General call enable
Bit 18 WUPEN: Wake-up from Stop mode enable
Note: WUPEN can be set only when DNF[3:0] = 0000.
698/874
Section 1.2 for the list of abbreviations used in register descriptions.
28 27 26 25
Res. Res. Res.
12 11 10 9
DNF[3:0]
rw rw rw rw
0: PEC calculation disabled
1: PEC calculation enabled
0: The SMBALERT# signal on SMBA pin is not supported in host mode (SMBHEN = 1). In
device mode (SMBHEN = 0), the SMBA pin is released and the alert response address
header is disabled (0001100x followed by NACK).
1: The SMBALERT# signal on SMBA pin is supported in host mode (SMBHEN = 1). In
device mode (SMBHEN = 0), the SMBA pin is driven low and the alert response address
header is enabled (0001100x followed by ACK).
0: Device default address disabled. Address 0b1100001x is NACKed.
1: Device default address enabled. Address 0b1100001x is ACKed.
0: Host address disabled. Address 0b0001000x is NACKed.
1: Host address enabled. Address 0b0001000x is ACKed.
0: General call disabled. Address 0b00000000 is NACKed.
1: General call enabled. Address 0b00000000 is ACKed.
0: Wake-up from Stop mode disabled.
1: Wake-up from Stop mode enabled.
24 23 22
ALERT SMBD
Res. PECEN
EN
rw rw
8 7 6
STOP
ERRIE TCIE
rw rw rw
RM0366 Rev 5
21 20 19 18
SMBH WUPE
GCEN
EN EN N
rw rw rw rw
5 4 3 2
NACKI ADDRI
RXIE
IE E E
rw rw rw rw
RM0366
17 16
NOSTR
SBC
ETCH
rw rw
1 0
TXIE PE
rw rw