ST STM32F301 6 Series Reference Manual page 141

RM0366
8.4.11 GPIO port bit reset register (GPIOx_BRR) (x = A to D and F)
Address offset: 0x28
Reset value: 0x0000 0000
31 30 29
Res. Res. Res.
15 14 13
BR15 BR14 BR13 BR12
w w w
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 BR[15:0]: Port x reset IO pin y (y = 15 to 0)
28 27 26 25
Res. Res. Res. Res.
12 11 10 9
BR11 BR10 BR9
w w w w
These bits are write-only. A read to these bits returns the value 0x0000.
0: No action on the corresponding ODx bit
1: Reset the corresponding ODx bit
24 23 22
Res. Res. Res.
8 7 6
BR8 BR7 BR6
w w w
RM0366 Rev 5
General-purpose I/Os (GPIO)
21 20 19 18
Res. Res. Res. Res.
5 4 3 2
BR5 BR4 BR3 BR2
w w w w
17 16
Res. Res.
1 0
BR1 BR0
w w
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