ST STM32F301 6 Series Reference Manual page 100

Reset and clock control (RCC)
The input capture channel of the Timer 16 can be a GPIO line or an internal clock of the
MCU. This selection is performed through the TI1_RMP [1:0] bits in the TIM16_OR register.
The possibilities available are the following ones.
•
TIM16 Channel1 is connected to the GPIO. Refer to the alternate function mapping in
the device datasheets.
•
TIM16 Channel1 is connected to the RTCCLK.
•
TIM16 Channel1 is connected to the HSE/32 Clock.
•
TIM16 Channel1 is connected to the microcontroller clock output (MCO), this selection
is controlled by the MCO[2:0] bits of the Clock configuration register (RCC_CFGR).
Calibration of the HSI
The primary purpose of connecting the LSE, through the MCO multiplexer, to the channel 1
input capture is to be able to precisely measure the HSI system clocks (for this, the HSI
should be used as the system clock source). The number of HSI clock counts between
consecutive edges of the LSE signal provides a measure of the internal clock period. Taking
advantage of the high precision of LSE crystals (typically a few tens of ppm's), it is possible
to determine the internal clock frequency with the same resolution, and trim the source to
compensate for manufacturing-process- and/or temperature- and voltage-related frequency
deviations.
The HSI oscillator has dedicated user-accessible calibration bits for this purpose.
The basic concept consists in providing a relative measurement (for example, the HSI/LSE
ratio): the precision is therefore closely related to the ratio between the two clock sources.
The higher the ratio is, the better the measurement is.
If LSE is not available, HSE/32 is the better option to reach the most precise calibration
possible.
Calibration of the LSI
The calibration of the LSI follows the same pattern that for the HSI, but changing the
reference clock. It is necessary to connect LSI clock to the channel 1 input capture of the
TIM16. Then define the HSE as system clock source, the number of his clock counts
between consecutive edges of the LSI signal provides a measure of the internal low speed
clock period.
The basic concept consists in providing a relative measurement (for example, the HSE/LSI
ratio): the precision is therefore closely related to the ratio between the two clock sources.
The higher the ratio is, the better the measurement is.
7.3 Low-power modes
APB peripheral clocks and DMA clock can be disabled by software.
Sleep mode stops the CPU clock. The memory interface clocks (Flash and RAM interfaces)
can be stopped by software during sleep mode. The AHB to APB bridge clocks are disabled
by hardware during Sleep mode when all the clocks of the peripherals connected to them
are disabled.
Stop mode stops all the clocks in the V18 domain and disables the PLL, the HSI and the
HSE oscillators.
100/874 RM0366 Rev 5
RM0366