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ST STM32F301 6 Series Reference Manual page 218

Advanced arm-based 32-bit mcus

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Analog-to-digital converters (ADC)
Figure 39. Example of JSQR queue of context with overflow during conversion
Write JSQR
JSQR
queue
JQOVF
Trigger 1
Trigger 2
ADC
J context
(returned by
reading JSQR)
ADC state
JEOS
1. Parameters:
P1: sequence of 2 conversions, hardware trigger 1
P2: sequence of 1 conversion, hardware trigger 2
P3: sequence of 3 conversions, hardware trigger 1
P4: sequence of 4 conversions, hardware trigger 1
It is recommended to manage the queue overflows as described below:
After each P context write into JSQR register, flag JQOVF shows if the write has been
ignored or not (an interrupt can be generated).
Avoid Queue overflows by writing the third context (P3) only once the flag JEOS of the
previous context P2 has been set. This ensures that the previous context has been
consumed and that the queue is not full.
Queue of context: Behavior when the queue becomes empty
Figure 40
empty in both cases JQM=0 or 1.
Figure 40. Example of JSQR queue of context with empty queue (case JQM=0)
P1
Write JSQR
EMPTY
JSQR queue
Trigger 1
ADC J context
(returned by
P1
EMPTY
reading JSQR)
ADC state
RDY
1. Parameters:
P1: sequence of 1 conversion, hardware trigger 1
P2: sequence of 1 conversion, hardware trigger 1
P3: sequence of 1 conversion, hardware trigger 1
218/874
P1
P2
EMPTY
P1
P1, P2
EMPTY
P1
RDY
and
Figure 41
show the behavior of the context Queue when the Queue becomes
P2
P1, P2
P1
Conversion1
P3
=> Overflow,
ignored
Conversion1
The queue is not empty
and maintains P2 because JQM=0
P2
P2
RDY
Conversion1
RDY
RM0366 Rev 5
P4
P2
P2, P4
Cleared by SW
P2
Conversion2
RDY
P3
P3
Conversion1
RDY
Conversion1
RM0366
Conversion1
MS30539V3
Queue not empty
(P3 maintained)
P3
RDY
Conv
MS30540V4

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