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ST STM32F301 6 Series Reference Manual page 55

Advanced arm-based 32-bit mcus

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RM0366
3.3
Memory protection
The user area of the flash memory can be protected against read by untrusted code. The
pages of the flash memory can also be protected against unwanted write due to loss of
program counter contexts. The write-protection granularity is two pages.
3.3.1
Read protection (RDP)
The read protection is activated by setting the RDP option byte and then, by applying a
system reset to reload the new RDP option byte.
There are three levels of read protection from no protection (level 0) to maximum protection
or no debug (level 2).
The flash memory is protected when the RDP option byte and its complement contain the
pair of values shown in
RDP byte value
Any value except
0xAA or 0xCC
The system memory area is read accessible whatever the protection level. It is never
accessible for program/erase operation
Level 0: no protection
Read, program, and erase operations into the main memory flash area are possible. The
option bytes are also accessible by all operations.
Level 1: Read protection
This is the default protection level when RDP option byte is erased. It is defined as well
when RDP value is at any value different from 0xAA and 0xCC, or even if the complement is
not correct.
User mode: Code executing in user mode can access main memory flash and option
bytes with all operations.
Debug, boot RAM, and bootloader modes: In debug mode or when code is running
from boot RAM or bootloader, the main flash memory and the backup registers
(RTC_BKPxR in the RTC) are totally inaccessible. In these modes, even a simple read
access generates a bus error and a Hard Fault interrupt. The main memory is
program/erase protected to prevent malicious or unauthorized users from
reprogramming any of the user code with a dump routine. Any attempted
program/erase operation sets the PGERR flag of Flash status register (FLASH_SR).
When the RDP is reprogrammed to the value 0xAA to move back to Level 0, a mass
erase of main memory flash is performed and the backup registers (RTC_BKPxR in the
RTC) are reset.
Table
4.
Table 4. Flash memory read protection status
0xAA
Any value (not necessarily
0xCC
RDP complement value
0x55
complementary)
except 0x55 and 0x33
0x33
RM0366 Rev 5
Embedded flash memory
Read protection level
Level 0 (ST production
configuration)
Level 1
Level 2
55/874
67

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