ST STM32F301 6 Series Reference Manual page 861

RM0366
28.15.12 TRACECLKIN connection inside the STM32F3xx
In the STM32F3xx, this TRACECLKIN input is internally connected to HCLK. This means
that when in asynchronous trace mode, the application is restricted to use to time frames
where the CPU frequency is stable.
Note: Important: when using asynchronous trace: it is important to be aware that:
The default clock of the STM32F3xx MCUs is the internal RC oscillator. Its frequency under
reset is different from the one after reset release. This is because the RC calibration is the
default one under system reset and is updated at each system reset release.
Consequently, the trace port analyzer (TPA) should not enable the trace (with the
TRACE_IOEN bit) under system reset, because a Synchronization Frame Packet will be
issued with a different bit time than trace packets, which will be transmitted after reset
release.
RM0366 Rev 5
Debug support (DBG)
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