ST STM32F301 6 Series Reference Manual page 146

System configuration controller (SYSCFG)
Bit 11 TIM16_DMA_RMP: TIM16 DMA request remapping bit
This bit is set and cleared by software. It controls the remapping of TIM16 DMA request.
Bits 10:7 Reserved, must be kept at reset value.
Bit 6 TIM1_ITR3_RMP: Timer 1 ITR3 selection
This bit is set and cleared by software. It controls the mapping of TIM1 ITR3.
Bits 5:2 Reserved, must be kept at reset value.
Bits 1:0 MEM_MODE: Memory mapping selection bits
This bit is set and cleared by software. It controls the memory internal mapping at address
0x0000 0000. After reset these bits take on the memory mapping selected by BOOT0 pin and
BOOT1 option bit.
9.1.2 SYSCFG external interrupt configuration register 1
(SYSCFG_EXTICR1)
Address offset: 0x08
Reset value: 0x0000 0000
31 30 29
Res. Res. Res. Res.
15 14 13
EXTI3[3:0]
rw rw rw
146/874
0: No remap (TIM16_CH1 and TIM16_UP DMA requests mapped on DMA1 channel 3)
1: Remap (TIM16_CH1 and TIM16_UP DMA requests mapped on DMA1 channel 6)
0: No remap
1: Remap (TIM1_ITR3 = TIM17_OC)
x0: Main Flash memory mapped at 0x0000 0000
01: System Flash memory mapped at 0x0000 0000
11: Embedded SRAM (on the D-Code bus) mapped at 0x0000 0000
28 27 26 25
Res. Res. Res.
12 11 10 9
EXTI2[3:0]
rw rw rw rw
24 23 22
Res. Res. Res.
8 7 6
EXTI1[3:0]
rw rw rw
RM0366 Rev 5
21 20 19 18
Res. Res. Res. Res.
5 4 3 2
EXTI0[3:0]
rw rw rw rw
RM0366
17 16
Res. Res.
1 0
rw rw