ST STM32F301 6 Series Reference Manual page 303

RM0366
15 Operational amplifier (OPAMP)
15.1 OPAMP introduction
STM32F3xx devices embed 1 operational amplifier OPAMP2. It can either be used as a
standalone amplifier or as a follower / programmable gain amplifier.
The operational amplifier output is internally connected to an ADC channel for measurement
purposes.
15.2 OPAMP main features
• Rail-to-rail input voltage ranget
•
Low offset voltage
• Capability of being configured as a standalone operational amplifier or as a
programmable gain amplifier (PGA)
•
Access to all terminals
•
Input multiplexer on inverting and non-inverting input
•
Input multiplexer can be triggered by a timer and synchronized with a PWM signal.
15.3 OPAMP functional description
15.3.1 General description
On every OPAMP, there is one 4:1 multiplexer on the non-inverting input and one 2:1
multiplexer on the inverting input.
The inverting and non inverting inputs selection is made using the VM_SEL and VP_SEL
bits respectively in the OPAMPx_CSR register.
The I/Os used as OPAMP input/outputs must be configured in analog mode in the GPIOs
registers.
The connections with dedicated I/O are summarized in the table below and in
15.3.2 Clock
The OPAMP clock provided by the clock controller is synchronized with the PCLK2 (APB2
clock). There is no clock enable control bit provided in the RCC controller. To use a clock
source for the OPAMP, the SYSCFG clock enable control bit must be set in the RCC
controller.
Table 50. Connections with dedicated I/O
OPAMP2 inverting input
PA5 (VM1)
PC5 (VM0)
-
RM0366 Rev 5
Operational amplifier (OPAMP)
OPAMP2 non inverting input
PA7 (VP0)
PD14 (VP1)
PB0 (VP2)
Figure 81.
303/874
312