ST STM32F301 6 Series Reference Manual page 155

RM0366
Peripheral Channel 1
ADC ADC1
SPI -
USART -
I2C I2C3_TX
TIM1 -
TIM2 TIM2_CH3
TIM6/DAC -
TIM15 -
TIM16 -
TIM17_CH1
TIM17
TIM17_UP
1. DMA request mapped on this DMA channel only if the corresponding remapping bit is set in
1 (SYSCFG_CFGR1).
Table 24. DMA requests for each channel
Channel 2 Channel 3
- -
SPI3_RX SPI3_TX
USART3_
USART3_RX USART1_TX USART1_RX USART2_RX USART2_TX
TX
I2C3_RX -
TIM1_CH1 TIM1_CH2
TIM2_UP -
TIM6_UP
-
DAC_CH1
- -
TIM16_CH1
-
TIM16_UP
- -
RM0366 Rev 5
Direct memory access controller (DMA)
Channel 4 Channel 5
-
SPI2_RX SPI2_TX
I2C2_TX I2C2_RX
TIM1_CH4
TIM1_TRIG TIM1_UP
TIM1_COM
- TIM2_CH1
-
(1)
TIM15_CH1
TIM15_UP
-
TIM15_TRIG
TIM15_COM
-
-
Channel6
- -
-
I2C1_TX
TIM1_CH3
-
- -
-
TIM16_CH1
-
(1)
TIM16_UP
- -
SYSCFG configuration register
Channel7
-
-
I2C1_RX
-
TIM2_CH2
TIM2_CH4
-
-
-
TIM17_CH1
(1)
TIM17_UP
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