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ST STM32F301 6 Series Reference Manual page 510

Advanced arm-based 32-bit mcus

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General-purpose timers (TIM15/TIM16/TIM17)
Figure 212. Capture/compare channel (example: channel 1 input stage)
TI1
Filter
f
DTS
downcounter
ICF[3:0]
TIMx_CCMR1
The output stage generates an intermediate waveform which is then used for reference:
OCxRef (active high). The polarity acts at the end of the chain.
Input mode
CC1S[1]
CC1S[0]
IC1PS
CC1E
CC1G
TIMx_EGR
510/874
TI1F_Rising
TI1F
Edge
TI1F_Falling
detector
TIMx_CCER
TI2F_Rising
(from channel 2)
TI2F_Falling
(from channel 2)
Figure 213. Capture/compare channel 1 main circuit
APB Bus
MCU-peripheral interface
Capture/compare preload register
Capture
compare shadow register
Counter
RM0366 Rev 5
TI1F_ED
0
TI1FP1
1
TI2FP1
CC1P
TRC
(from slave mode
controller)
0
1
16/32-bit
Compare
transfer
Comparator
To the slave mode controller
01
IC1
Divider
10
/1, /2, /4, /8
11
CC1S[1:0]
ICPS[1:0]
TIMx_CCER
TIMx_CCMR1
Output mode
CC1S[1]
CC1S[0]
OC1PE
UEV
TIMx_CCMR1
(from time
base unit)
CNT>CCR1
CNT=CCR1
RM0366
IC1PS
CC1E
MS31088V2
OC1PE
MSv63030V1

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