ST STM32F301 6 Series Reference Manual page 350

Advanced-control timer (TIM1)
17.3.4 External trigger input
The timer features an external trigger input ETR. It can be used as:
•
external clock (external clock mode 2, see
•
trigger for the slave mode (see
•
PWM reset input for cycle-by-cycle current regulation (see
Figure 113
ETP bit in TIMxSMCR register. The trigger can be prescaled with the divider programmed
by the ETPS[1:0] bitfield and digitally filtered with the ETF[3:0] bitfield.
ETR input
350/874
below describes the ETR input conditioning. The input polarity is defined with the
Figure 113. External trigger input block
ETR
0
Divider
/1, /2, /4, /8
1
ETP ETPS[1:0]
TIMx_SMCR TIMx_SMCR
RM0366 Rev 5
Section 17.3.5)
Section 17.3.25)
ETRP
Filter
downcounter
f
DTS
ETF[3:0]
TIMx_SMCR
RM0366
Section 17.3.7)
To the Output mode controller
To the CK_PSC circuitry
To the Slave mode controller
MS34403V2