ST STM32F301 6 Series Reference Manual page 150

System configuration controller (SYSCFG)
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:12 EXTI15[3:0]: EXTI15 configuration bits
Bits 11:8 EXTI14[3:0]: EXTI14 configuration bits
Bits 7:4 EXTI13[3:0]: EXTI13 configuration bits
Bits 3:0 EXTI12[3:0]: EXTI12 configuration bits
Note: Some of the I/O pins mentioned in the above register may not be available on small
packages.
9.1.6 SYSCFG configuration register 2 (SYSCFG_CFGR2)
Address offset: 0x18
System reset value: 0x0000
31 30 29 28
Res. Res. Res. Res.
15 14 13 12
Res Res Res Res
1. This bit is not available on the STM32F318xx
150/874
These bits are written by software to select the source input for the EXTI15 external
interrupt.
x000: PA[15] pin
x001: PB[15] pin
x010: PC[15] pin
Other configurations: reserved
These bits are written by software to select the source input for the EXTI14 external
interrupt.
x000: PA[14] pin
x001: PB[14] pin
x010: PC[14] pin
Other configurations: reserved
These bits are written by software to select the source input for the EXTI13 external
interrupt.
x000: PA[13] pin
x001: PB[13] pin
x010: PC[13] pin
Other configurations: reserved
These bits are written by software to select the source input for the EXTI12 external
interrupt.
x000: PA[12] pin
x001: PB[12] pin
x010: PC[12] pin
Other configurations: reserved
27 26 25 24
Res. Res. Res. Res.
11 10 9 8
Res Res Res Res
RM0366 Rev 5
23 22 21
Res. Res. Res. Res.
7 6 5
Res Res Res
20 19 18 17
Res. Res. Res.
4 3 2 1
PVD_
LOCK
Res Res Res
(1)
rw
RM0366
16
Res.
0
Res