ST STM32F301 6 Series Reference Manual page 229

RM0366
12-bit data
bit15
SEXT D11
10-bit data
bit15
SEXT D9
8-bit data
bit15
SEXT D7
6-bit data
bit15
SEXT SEXT SEXT SEXT SEXT SEXT SEXT
ADC overrun (OVR, OVRMOD)
The overrun flag (OVR) notifies of a buffer overrun event, when the regular converted data
was not read (by the CPU or the DMA) before new converted data became available.
The OVR flag is set if the EOC flag is still 1 at the time when a new conversion completes.
An interrupt can be generated if bit OVRIE=1.
When an overrun condition occurs, the ADC is still operating and can continue to convert
unless the software decides to stop and reset the sequence by setting bit ADSTP=1.
OVR flag is cleared by software by writing 1 to it.
It is possible to configure if data is preserved or overwritten when an overrun event occurs
by programming the control bit OVRMOD:
•
OVRMOD=0: The overrun event preserves the data register from being overrun: the
old data is maintained and the new conversion is discarded and lost. If OVR remains at
1, any further conversions will occur but the result data will be also discarded.
•
OVRMOD=1: The data register is overwritten with the last conversion result and the
previous unread data is lost. If OVR remains at 1, any further conversions will operate
normally and the ADCx_DR register will always contain the latest converted data.
Figure 56. Left alignment (offset enabled, signed value)
D10 D9 D8 D7
D8 D7 D6 D5
D6 D5 D4 D3
RM0366 Rev 5
Analog-to-digital converters (ADC)
bit7
D6 D5 D4 D3
bit7
D4 D3 D2 D1
bit7
D2 D1 D0 0
bit7
SEXT SEXT D5
D2 D1 D0 0
D0 0 0 0
0 0 0 0
D4 D3 D2 D1
bit0
0 0
bit0
0 0
bit0
0 0
bit0
D0 0
MS31018V1
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