ST STM32F301 6 Series Reference Manual page 74

Cyclic redundancy check calculation unit (CRC)
5.4.6 CRC register map
Offset Register name
CRC_DR
0x00
Reset value
CRC_IDR
0x04
Reset value
CRC_CR
0x08
Reset value
CRC_INIT
0x10
Reset value
CRC_POL
0x14
Reset value
Refer to
74/874
Table 12. CRC register map and reset values
1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1
0 0 0 0 0 1 0 0 1
Section 2.2: Memory organization
DR[31:0]
1 1 1 1 1 1 1 1 1
CRC_INIT[31:0]
1 1 1 1 1 1 1 1 1
POL[31:0]
1 0 0 0 0 0 1 0 0
for the register boundary addresses.
RM0366 Rev 5
1 1 1 1 1 1 1 1 1
0 0 0
0 0 0
1 1 1 1 1 1 1 1 1
0 1 1 1 0 1 1 0 1
RM0366
1 1 1 1 1
IDR[7:0]
0 0 0 0 0
0 0 0
1 1 1 1 1
1 0 1 1 1