ST STM32F301 6 Series Reference Manual page 754

Universal synchronous/asynchronous receiver transmitter (USART/UART)
In these conditions, according to
[3:0] = 0000, the USART receiver tolerance is 4.86 %.
DTRA + DQUANT + DREC + DTCL + DWU < USART receiver's tolerance
DWU max = t
Tbit Min = t
If we consider an ideal case where the parameters DTRA, DQUANT, DREC and DTCL are
at 0%, the DWU max is 4.86 %. In reality, we need to consider at least the HSI inaccuracy.
Let us consider HSI inaccuracy = 1 %, t
mode, with the main regulator in Run mode).
DWU max = 4.86 % - 1 % = 3.86 %
Tbit min = 3.125 μs / (9 ₓ 3.86 %) = 9 μs
In these conditions, the maximum baud rate allowing to wake up correctly from Stop mode is
1/9 μs = 111 kbaud.
26.6 USART in low-power modes
Sleep
Stop
Standby
26.7 USART interrupts
Transmit data register empty
CTS interrupt
Transmission Complete
Receive data register not empty (data ready to be read)
Overrun error detected
Idle line detected
Parity error
LIN break
754/874
/ (9 x Tbit Min)
WUUSART
/ (9 x DWU max)
WUUSART
Table 105. Effect of low-power modes on the USART
Mode
No effect. USART interrupt causes the device to exit Sleep mode.
The USART is able to wake up the MCU from Stop mode when the UESM
bit is set and the USART clock is set to HSI or LSE.
The MCU wake-up from Stop mode can be done using either a standard
RXNE or a WUF interrupt.
The USART is powered down and must be reinitialized when the device
has exited from Standby mode.
Table 106. USART interrupt requests
Interrupt event
Table 102: Tolerance of the USART receiver when BRR
= 3.125 μs (in case of wake-up from Stop
WUUSART
Description
RM0366 Rev 5
RM0366
Enable Control
Event flag
bit
TXE TXEIE
CTSIF CTSIE
TC TCIE
RXNE
RXNEIE
ORE
IDLE IDLEIE
PE PEIE
LBDF LBDIE