ST STM32F301 6 Series Reference Manual page 494

General-purpose timer (TIM2)
18.4.22 TIMx register map
TIMx registers are mapped as described in the table below:
Register
Offset
name
TIMx_CR1
0x00
Reset value
TIMx_CR2
0x04
Reset value
TIMx_SMCR
0x08
Reset value
TIMx_DIER
0x0C
Reset value
TIMx_SR
0x10
Reset value
TIMx_EGR
0x14
Reset value
TIMx_CCMR1
Output
Compare mode
Reset value
0x18
TIMx_CCMR1
Input Capture
mode
Reset value
TIMx_CCMR2
Output
Compare mode
Reset value
0x1C
TIMx_CCMR2
Input Capture
mode
Reset value
TIMx_CCER
0x20
Reset value
494/874
Table 66. TIM2 register map and reset values
0
0
RM0366 Rev 5
CKD
[1:0]
0 0
ETPS
ETF[3:0]
[1:0]
0 0 0 0 0 0 0 0
0 0 0 0 0
0 0 0 0
OC2M CC2S
[2:0] [1:0]
0 0 0 0 0 0 0 0
IC2
CC2S
IC2F[3:0] PSC
[1:0]
[1:0]
0 0 0 0 0 0 0
OC4M CC4S
[2:0] [1:0]
0 0 0 0 0 0 0 0
IC4
CC4S
IC4F[3:0] PSC
[1:0]
[1:0]
0 0 0 0 0 0 0
0 0 0 0 0
RM0366
CMS
[1:0]
0 0 0 0 0 0 0 0
MMS[2:0]
0 0 0 0 0
TS[2:0] SMS[2:0]
0 0 0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
OC1M CC1S
[2:0] [1:0]
0 0 0 0 0 0 0 0
IC1
CC1S
IC1F[3:0] PSC
[1:0]
[1:0]
0 0 0 0 0 0 0 0
OC3M CC3S
[2:0] [1:0]
0 0 0 0 0 0 0 0
IC3
CC3S
IC3F[3:0] PSC
[1:0]
[1:0]
0 0 0 0 0 0 0 0
0 0 0 0 0 0
0
0
0
0
0
0
0
0
0
0