ST STM32F301 6 Series Reference Manual page 687

RM0366
Figure 270. Transfer sequence flow for SMBus target transmitter N bytes + PEC
Figure 271. Transfer bus diagram for SMBus target transmitter (SBC = 1)
Example SMBus
NBYTES
EV1: ADDR ISR: check ADDCODE, program NBYTES = 3, set PECBYTE, set ADDRCF
EV2: TXIS ISR: wr data1
EV3: TXIS ISR: wr data2
No
Read ADDCODE and DIR in I2C_ISR
target transmitter 2 bytes + PEC
ADDR TXIS TXIS
S Address A data1
EV1 EV2
EV3
Inter-integrated circuit interface (I2C)
SMBus target
transmission
Target initialization
I2C_ISR.ADDR
= 1?
Yes
I2C_CR2.NBYTES = N + 1
PECBYTE = 1
Set I2C_ICR.ADDRCF
I2C_ISR.TXIS
= 1?
Yes
Write I2C_TXDR.TXDATA
A data2 A PEC
3
RM0366 Rev 5
SCL
stretched
No
legend:
NA P
MSv19867V3
transmission
reception
SCL stretch
MSv19869V3
687/874
711