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ST STM32F301 6 Series Reference Manual page 530

Advanced arm-based 32-bit mcus

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General-purpose timers (TIM15/TIM16/TIM17)
Slave mode: Trigger mode
The counter can start in response to an event on a selected input.
In the following example, the upcounter starts in response to a rising edge on TI2 input:
1.
Configure the channel 2 to detect rising edges on TI2. Configure the input filter duration
(in this example, we do not need any filter, so we keep IC2F=0000). The capture
prescaler is not used for triggering, so it does not need to be configured. The CC2S bits
are configured to select the input capture source only, CC2S=01 in TIMx_CCMR1
register. Write CC2P='1' and CC2NP='0' in the TIMx_CCER register to validate the
polarity (and detect low level only).
2.
Configure the timer in trigger mode by writing SMS=110 in the TIMx_SMCR register.
Select TI2 as the input source by writing TS=110 in the TIMx_SMCR register.
When a rising edge occurs on TI2, the counter starts counting on the internal clock and the
TIF flag is set.
The delay between the rising edge on TI2 and the actual start of the counter is due to the
resynchronization circuit on TI2 input.
Counter clock = ck_cnt = ck_psc
19.4.20
Slave mode – combined reset + trigger mode (TIM15 only)
In this case, a rising edge of the selected trigger input (TRGI) reinitializes the counter,
generates an update of the registers, and starts the counter.
This mode is used for one-pulse mode.
19.4.21
DMA burst mode
The TIMx timers have the capability to generate multiple DMA requests on a single event.
The main purpose is to be able to re-program several timer registers multiple times without
software overhead, but it can also be used to read several registers in a row, at regular
intervals.
The DMA controller destination is unique and must point to the virtual register TIMx_DMAR.
On a given timer event, the timer launches a sequence of DMA requests (burst). Each write
into the TIMx_DMAR register is actually redirected to one of the timer registers.
530/874
Figure 230. Control circuit in trigger mode
TI2
cnt_en
Counter register
TIF
RM0366 Rev 5
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RM0366
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MS31403V1

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