ST STM32F301 6 Series Reference Manual page 733

RM0366
In mute mode:
•
None of the reception status bits can be set.
•
All the receive interrupts are inhibited.
•
The RWU bit in USART_ISR register is set to 1. RWU can be controlled automatically
by hardware or by software, through the MMRQ bit in the USART_RQR register, under
certain conditions.
The USART can enter or exit from mute mode using one of two methods, depending on the
WAKE bit in the USART_CR1 register:
• Idle Line detection if the WAKE bit is reset,
•
Address Mark detection if the WAKE bit is set.
Idle line detection (WAKE=0)
The USART enters mute mode when the MMRQ bit is written to 1 and the RWU is
automatically set.
It wakes up when an Idle frame is detected. Then the RWU bit is cleared by hardware but
the IDLE bit is not set in the USART_ISR register. An example of mute mode behavior using
Idle line detection is given in
Note: If the MMRQ is set while the IDLE character has already elapsed, mute mode will not be
entered (RWU is not set).
If the USART is activated while the line is idle, the idle state is detected after the duration of
one IDLE frame (not only after the reception of one character frame).
4-bit/7-bit address mark detection (WAKE=1)
In this mode, bytes are recognized as addresses if their MSB is a '1' otherwise they are
considered as data. In an address byte, the address of the targeted receiver is put in the 4
or 7 LSBs. The choice of 7 or 4-bit address detection is done using the ADDM7 bit. This 4-
bit/7-bit word is compared by the receiver with its own address which is programmed in the
ADD bits in the USART_CR2 register.
Note: In 7-bit and 9-bit data modes, address detection is done on 6-bit and 8-bit addresses
(ADD[5:0] and ADD[7:0]) respectively.
Universal synchronous/asynchronous receiver transmitter (USART/UART)
Figure
Figure 283. Mute mode using Idle line detection
Data 1 Data 2
RX
RWU
MMRQ written to 1
RM0366 Rev 5
283.
Data 3 Data 4 IDLE
Mute mode
Idle frame detected
RXNE RXNE
Data 5 Data 6
Normal mode
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