ST STM32F301 6 Series Reference Manual page 77

RM0366
6.1.1 Independent A/D and D/A converter supply and reference voltage
To improve conversion accuracy, the ADC and the DAC have an independent power supply,
which can be separately filtered and shielded from noise on the PCB.
The ADC and DAC voltage supply input is available on a separate VDDA pin. An isolated
supply ground connection is provided on the VSSA pin.
64-pin, 49-pin, 48-pin, and 32-pin package connections
On these packages, the VREF+ and VREF-pins are not available. They are internally
connected to the ADC voltage supply (V
The V
DDA
supply is used, V
circuit to ensure a noise free V
When V
DDA
a safe potential difference between V
external Schottky diode can be used between V
maximum allowed difference.
6.1.2 Battery backup domain
To retain the content of the backup registers and supply the RTC function when V
turned off, V
or another source.
The V
BAT
the RTC to operate even when the main power supply is turned off. The switch to the V
supply is controlled by the power-down reset (PDR) embedded in the reset block.
Warning:
If no external battery is used in the application, it is recommended to connect V
V supply and add a 100 nF ceramic decoupling capacitor on the VBAT pin. For more
DD
details, refer to AN4206.
supply/reference voltage can be equal to or higher than V
can be externally connected to V
DDA
DDA
is different from V
DD
pin can be connected to an optional standby voltage supplied by a battery
BAT
pin powers the RTC unit, the LSE oscillator and the PC13 to PC15 I/Os, allowing
During
t
RSTTEMPO
is detected, the power switch between V
connected to V
During the startup phase, if V
t (refer to the datasheet for the value of t
RSTTEMPO
and V > V
DD
through an internal diode connected between V
power switch (V
If the power supply/battery connected to the V
support this current injection, it is strongly recommended to
connect an external low-drop diode between this power
supply and the V
) and ground (V
DDA
/reference voltage.
, V must always be higher or equal to V
DDA
and V during power-up/power-down, an
DDA DD
and V
DD
(temporization at V
.
BAT
DD
+ 0.6 V, a current may be injected into V
BAT
).
BAT
pin.
BAT
RM0366 Rev 5
Power control (PWR)
) respectively.
SSA
. When a single
DD
, through the external filtering
DD
DD
. Refer to the datasheet for the
DDA
startup) or after a PDR
DD
and V
BAT DD
is established in less than
RSTTEMPO
and the
DD
pin cannot
BAT
. To maintain
is
DD
BAT
remains
)
BAT
to the
BAT
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