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Real-time clock (RTC)
24.6.9
RTC write protection register (RTC_WPR)
Address offset: 0x24
Reset value: 0x0000 0000
31
30
29
Res.
Res.
Res.
Res.
15
14
13
Res.
Res.
Res.
Res.
Bits 31:8 Reserved, must be kept at reset value.
Bits 7:0 KEY[7:0]: Write protection key
This byte is written by software.
Reading this byte always returns 0x00.
Refer to
protection.
24.6.10
RTC sub second register (RTC_SSR)
Address offset: 0x28
Backup domain reset value: 0x0000 0000
System reset: 0x0000 0000 when BYPSHAD = 0. Not affected when BYPSHAD = 1.
31
30
29
Res.
Res.
Res.
Res.
15
14
13
r
r
r
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 SS[15:0]: Sub second value
SS[15:0] is the value in the synchronous prescaler counter. The fraction of a second is given by
the formula below:
Second fraction = (PREDIV_S - SS) / (PREDIV_S + 1)
Note: SS can be larger than PREDIV_S only after a shift operation. In that case, the correct
634/874
28
27
26
25
Res.
Res.
Res.
12
11
10
9
Res.
Res.
Res.
RTC register write protection
28
27
26
25
Res.
Res.
Res.
12
11
10
9
r
r
r
r
time/date is one second less than as indicated by RTC_TR/RTC_DR.
24
23
22
Res.
Res.
Res.
8
7
6
Res.
w
w
for a description of how to unlock RTC register write
24
23
22
Res.
Res.
Res.
8
7
6
SS[15:0]
r
r
r
RM0366 Rev 5
21
20
19
18
Res.
Res.
Res.
Res.
5
4
3
2
KEY[7:0]
w
w
w
w
21
20
19
18
Res.
Res.
Res.
Res.
5
4
3
2
r
r
r
r
RM0366
17
16
Res.
Res.
1
0
w
w
17
16
Res.
Res.
1
0
r
r
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