ST STM32F301 6 Series Reference Manual page 734

Universal synchronous/asynchronous receiver transmitter (USART/UART)
The USART enters mute mode when an address character is received which does not
match its programmed address. In this case, the RWU bit is set by hardware. The RXNE
flag is not set for this address byte and no interrupt or DMA request is issued when the
USART enters mute mode.
The USART also enters mute mode when the MMRQ bit is written to 1. The RWU bit is also
automatically set in this case.
The USART exits from mute mode when an address character is received which matches
the programmed address. Then the RWU bit is cleared and subsequent bytes are received
normally. The RXNE bit is set for the address character since the RWU bit has been
cleared.
An example of mute mode behavior using address mark detection is given in
In this example, the current address of the receiver is 1
(programmed in the USART_CR2 register)
RX
RWU
26.5.8 Modbus communication using USART
The USART offers basic support for the implementation of Modbus/RTU and Modbus/ASCII
protocols. Modbus/RTU is a half duplex, block transfer protocol. The control part of the
protocol (address recognition, block integrity control and command interpretation) must be
implemented in software.
The USART offers basic support for the end of the block detection, without software
overhead or other resources.
Modbus/RTU
In this mode, the end of one block is recognized by a "silence" (idle line) for more than 2
character times. This function is implemented through the programmable timeout function.
The timeout function and interrupt must be activated, through the RTOEN bit in the
USART_CR2 register and the RTOIE in the USART_CR1 register. The value corresponding
to a timeout of 2 character times (for example 22 x bit duration) must be programmed in the
RTO register. when the receive line is idle for this duration, after the last stop bit is received,
an interrupt is generated, informing the software that the current block reception is
completed.
734/874
Figure 284. Mute mode using address mark detection
IDLE Addr=0 Data 1 Data 2
MMRQ written to 1
(RXNE was cleared)
Non-matching address
IDLE Addr=1 Data 3 Data 4 Addr=2 Data 5
Mute mode
Matching address
RM0366 Rev 5
RXNE RXNE RXNE
Normal mode
Non-matching address
RM0366
Figure 284.
Mute mode
MSv31155V1