ST STM32F301 6 Series Reference Manual page 236

Analog-to-digital converters (ADC)
12.3.28 Analog window watchdog (AWD1EN, JAWD1EN, AWD1SGL,
AWD1CH, AWD2CH, AWD3CH, AWD_HTx, AWD_LTx, AWDx)
The three AWD analog watchdogs monitor whether some channels remain within a
configured voltage range (window).
AWDx flag and interrupt
An interrupt can be enabled for each of the 3 analog watchdogs by setting AWDxIE in the
ADCx_IER register (x=1,2,3).
AWDx (x=1,2,3) flag is cleared by software by writing 1 to it.
The ADC conversion result is compared to the lower and higher thresholds before
alignment.
Description of analog watchdog 1
The AWD analog watchdog 1 is enabled by setting the AWD1EN bit in the ADCx_CFGR
register. This watchdog monitors whether either one selected channel or all enabled
channels
Table 38
watchdog on one or more channels.
Channels guarded by the analog
None
All injected channels
All regular channels
All regular and injected channels
(1)
Single
(1)
Single
(1)
Single
1. Selected by the AWD1CH[4:0] bits. The channels must also be programmed to be converted in the
appropriate regular or injected sequence.
The AWD1 analog watchdog status bit is set if the analog voltage converted by the ADC is
below a lower threshold or above a higher threshold.
236/874
Figure 63. Analog watchdog's guarded area
Higher threshold
Lower threshold
(1)
remain within a configured voltage range (window).
shows how the ADCx_CFGR registers should be configured to enable the analog
Table 38. Analog watchdog channel selection
watchdog
injected channel
regular channel
regular or injected channel
Analog voltage
Guarded area
AWD1SGL bit
x
0
0
0
1
1
1
RM0366 Rev 5
HTR
LTR
AWD1EN bit JAWD1EN bit
0
0
1
1
0
1
1
RM0366
ai16048
0
1
0
1
1
0
1