ST STM32F301 6 Series Reference Manual page 126

General-purpose I/Os (GPIO)
8 General-purpose I/Os (GPIO)
8.1 Introduction
8.2 GPIO main features
•
Output states: push-pull or open drain + pull-up/down
•
Output data from output data register (GPIOx_ODR) or peripheral (alternate function
output)
• Speed selection for each I/O
•
Input states: floating, pull-up/down, analog
• Input data to input data register (GPIOx_IDR) or peripheral (alternate function input)
•
Bit set and reset register (GPIOx_ BSRR) for bitwise write access to GPIOx_ODR
• Locking mechanism (GPIOx_LCKR) provided to freeze the port A, B, C, D and F I/O
configuration.
•
Analog function
•
Alternate function selection registers
•
Fast toggle capable of changing every clock cycle
•
Highly flexible pin multiplexing allows the use of I/O pins as GPIOs or as one of several
peripheral functions
8.3 GPIO functional description
Subject to the specific hardware characteristics of each I/O port listed in the datasheet, each
port bit of the general-purpose I/O (GPIO) ports can be individually configured by software in
several modes:
• Input floating
•
Input pull-up
• Input-pull-down
•
Analog
• Output open-drain with pull-up or pull-down capability
•
Output push-pull with pull-up or pull-down capability
• Alternate function push-pull with pull-up or pull-down capability
•
Alternate function open-drain with pull-up or pull-down capability
Each I/O port bit is freely programmable, however the I/O port registers have to be
accessed as 32-bit words, half-words or bytes. The purpose of the GPIOx_BSRR register is
to allow atomic read/modify accesses to any of the GPIOx_ODR registers. In this way, there
is no risk of an IRQ occurring between the read and the modify access.
Figure 14
port bit, respectively.
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and Figure 15 show the basic structures of a standard and a 5-Volt tolerant I/O
Table 20 gives the possible port bit configurations.
RM0366 Rev 5
RM0366