ST STM32F301 6 Series Reference Manual page 180

Interrupts and events
11.2.3 Wake-up event management
STM32F3xx devices are able to handle external or internal events to wake up the core
(WFE). The wake-up event can be generated either by:
•
enabling an interrupt in the peripheral control register but not in the NVIC, and enabling
the SEVONPEND bit in the Cortex-M4 System Control register. When the MCU
resumes from WFE, the EXTI peripheral interrupt pending bit and the peripheral NVIC
IRQ channel pending bit (in the NVIC interrupt clear pending register) have to be
cleared.
•
or by configuring an external or internal EXTI line in event mode. When the CPU
resumes from WFE, it is not necessary to clear the peripheral interrupt pending bit or
the NVIC IRQ channel pending bit as the pending bit corresponding to the event line is
not set.
11.2.4 Asynchronous Internal Interrupts
Some communication peripherals (UART, I2C) are able to generate events when the system
is in run mode and also when the system is in stop mode allowing to wake up the system
from stop mode.
To accomplish this, the peripheral is asked to generate both a synchronized (to the system
clock, for example, APB clock) and an asynchronous version of the event.
11.2.5 Functional description
For the external interrupt lines, to generate the interrupt, the interrupt line should be
configured and enabled. This is done by programming the two trigger registers with the
desired edge detection and by enabling the interrupt request by writing a '1' to the
corresponding bit in the interrupt mask register. When the selected edge occurs on the
external interrupt line, an interrupt request is generated. The pending bit corresponding to
the interrupt line is also set. This request is reset by writing a 1 in the pending register.
For the internal interrupt lines, the active edge is always the rising edge. The interrupt is
enabled by default in the interrupt mask register and there is no corresponding pending bit
in the pending register.
To generate the event, the event line should be configured and enabled. This is done by
programming the two trigger registers with the desired edge detection and by enabling the
event request by writing a '1' to the corresponding bit in the event mask register. When the
selected edge occurs on the event line, an event pulse is generated. The pending bit
corresponding to the event line is not set.
For the external lines, an interrupt/event request can also be generated by software by
writing a 1 in the software interrupt/event register.
Note: The interrupts or events associated to the internal lines can be triggered only when the
system is in STOP mode. If the system is still running, no interrupt/event is generated.
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