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Touch sensing controller (TSC)
16.6.9
TSC I/O group control status register (TSC_IOGCSR)
Address offset: 0x30
Reset value: 0x0000 0000
31
30
29
Res.
Res.
Res.
Res.
15
14
13
Res.
Res.
Res.
Res.
Bits 31:22 Reserved, must be kept at reset value.
Bits 21:16 GxS: Analog I/O group x status
Note: When a max count error is detected the remaining GxS bits of the enabled analog I/O
Bits 15:6 Reserved, must be kept at reset value.
Bits 5:0 GxE: Analog I/O group x enable
16.6.10
TSC I/O group x counter register (TSC_IOGxCR)
x represents the analog I/O group number.
Address offset: 0x30 + 0x04 * x, (x = 1 to 6)
Reset value: 0x0000 0000
31
30
29
Res.
Res.
Res.
Res.
15
14
13
Res.
Res.
r
Bits 31:14 Reserved, must be kept at reset value.
Bits 13:0 CNT[13:0]: Counter value
These bits represent the number of charge transfer cycles generated on the analog I/O
group x to complete its acquisition (voltage across C
328/874
28
27
26
25
Res.
Res.
Res.
12
11
10
9
Res.
Res.
Res.
These bits are set by hardware when the acquisition on the corresponding enabled analog
I/O group x is complete. They are cleared by hardware when a new acquisition is started.
0: Acquisition on analog I/O group x is ongoing or not started
1: Acquisition on analog I/O group x is complete
groups are not set.
These bits are set and cleared by software to enable/disable the acquisition (counter is
counting) on the corresponding analog I/O group x.
0: Acquisition on analog I/O group x disabled
1: Acquisition on analog I/O group x enabled
28
27
26
25
Res.
Res.
Res.
12
11
10
9
r
r
r
r
24
23
22
Res.
Res.
Res.
8
7
6
Res.
Res.
Res.
24
23
22
Res.
Res.
Res.
8
7
6
CNT[13:0]
r
r
r
RM0366 Rev 5
21
20
19
18
G6S
G5S
G4S
G3S
r
r
r
r
5
4
3
2
G6E
G5E
G4E
G3E
rw
rw
rw
rw
21
20
19
18
Res.
Res.
Res.
Res.
5
4
3
2
r
r
r
r
has reached the threshold).
S
RM0366
17
16
G2S
G1S
r
r
1
0
G2E
G1E
rw
rw
17
16
Res.
Res.
1
0
r
r
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