ST STM32F301 6 Series Reference Manual page 281

RM0366
Figure 72. Timing diagram for conversion with trigger disabled TEN = 0
APB1_CLK
Independent trigger with single LFSR generation
To configure the DAC in this conversion mode (see
following sequence is required:
1. Set the DAC channel trigger enable bit TENx.
2. Configure the trigger source by setting TSELx[2:0] bits.
3. Configure the DAC channel WAVEx[1:0] bits as "01" and the same LFSR mask value in
the MAMPx[3:0] bits
4. Load the DAC channel data into the desired DAC_DHRx register (DHR12RD,
DHR12LD or DHR8RD).
When a DAC channelx trigger arrives, the LFSRx counter, with the same mask, is added to
the DHRx register and the sum is transferred into DAC_DORx (three APB clock cycles
later). Then the LFSRx counter is updated.
Independent trigger with single triangle generation
To configure the DAC in this conversion mode (see
the following sequence is required:
1. Set the DAC channelx trigger enable TENx bits.
2. Configure the trigger source by setting TSELx[2:0] bits.
3. Configure the DAC channelx WAVEx[1:0] bits as "1x" and the same maximum
amplitude value in the MAMPx[3:0] bits
4. Load the DAC channelx data into the desired DAC_DHRx register. (DHR12RD,
DHR12LD or DHR8RD).
When a DAC channelx trigger arrives, the DAC channelx triangle counter, with the same
triangle amplitude, is added to the DHRx register and the sum is transferred into
DAC_DORx (three APB clock cycles later). The DAC channelx triangle counter is then
updated.
13.5.3 DAC output voltage
Digital inputs are converted to output voltages on a linear conversion between 0 and V
The analog output voltages on each DAC channel pin are determined by the following
equation:
DACoutput
DHR
DOR
DOR
× ------------- -
= V
DDA
4096
RM0366 Rev 5
Digital-to-analog converter (DAC1)
0x1AC
0x1AC
t
SETTLING
Section 13.6: Noise
Section 13.7: Triangle-wave
Output voltage
available on DAC_OUT pin
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DDA
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