ST STM32F301 6 Series Reference Manual page 300

Comparator (COMP)
15 14 13 12
COMP
Res. COMP6OUTSEL[3:0]
6POL
rw rw rw
Bit 31 COMP6LOCK: Comparator 6 lock
This bit is write-once. It is set by software. It can only be cleared by a system reset.
It allows to have COMP6_CSR register as read-only.
0: COMP6_CSR is read-write.
1: COMP6_CSR is read-only.
Bit 30 COMP6OUT: Comparator 6 output
This read-only bit is a copy of comparator 6 output state.
0: Output is low (non-inverting input below inverting input).
1: Output is high (non-inverting input above inverting input).
Bits 29: Reserved, must be kept at reset value.
Bits 20:18 COMP6_BLANKING: Comparator 6 blanking source
These bits select which Timer output controls the comparator 6 output blanking.
000: No blanking
011: TIM2 OC4 selected as blanking source
100: TIM15 OC2 selected as blanking source
Other configurations: reserved
The blanking signal is active high (masking comparator output signal). It is up to the user to program
the comparator and blanking signal polarity correctly.
Bits 17:16 Reserved, must be kept at reset value.
Bit 15 COMP6POL: Comparator 6 output polarity
This bit is used to invert the comparator 6 output.
0: Output is not inverted
1: Output is inverted
Bit 14 Reserved, must be kept at reset value.
Bits 13:10 COMP6OUTSEL[3:0]: Comparator 6 output selection
These bits select which Timer input must be connected with the comparator 6 output.
0000: No timer input
0001: (BRK_ACTH) Timer 1 break input
0010: (BRK2) Timer 1 break input 2
0101: Timer 1 break input 2
0110: Timer 2 input capture 2
1000: Timer 2 OCREF_CLR input
1001: Timer 16 OCREF_CLR input
1010: Timer 16 input capture 1
Remaining combinations: reserved.
Bits 9:7 Reserved, must be kept at reset value.
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11 10 9 8
Res. Res.
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RM0366 Rev 5
7 6 5 4
Res. COMP6INMSEL[2:0]
rw rw rw
RM0366
3 2 1 0
COMP6
Res. Res.
EN
rw