ST STM32F301 6 Series Reference Manual page 283

RM0366
13.6 Noise generation
In order to generate a variable-amplitude pseudonoise, an LFSR (linear feedback shift
register) is available. DAC noise generation is selected by setting WAVEx[1:0] to "01". The
preloaded value in LFSR is 0xAAA. This register is updated three APB clock cycles after
each trigger event, following a specific calculation algorithm.
The LFSR value, that may be masked partially or totally by means of the MAMPx[3:0] bits in
the DAC_CR register, is added up to the DAC_DHRx contents without overflow and this
value is then stored into the DAC_DORx register.
If LFSR is 0x0000, a '1 is injected into it (antilock-up mechanism).
It is possible to reset LFSR wave generation by resetting the WAVEx[1:0] bits.
Figure 74. DAC conversion (SW trigger enabled) with LFSR wave generation
APB1_CLK
DHR
DOR
SWTRIG
Note: The DAC trigger must be enabled for noise generation by setting the TENx bit in the
DAC_CR register.
Figure 73. DAC LFSR register calculation algorithm
XOR
12
X
11 10 9
0x00
RM0366 Rev 5
Digital-to-analog converter (DAC1)
6 4
X X
8 7 6 5 4
12
NOR
0xAAA
0
X X
3 2 1 0
ai14713c
0xD55
ai14714b
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